Design News: SoC NoCs: Homegrown or Commercial Off-the-Shelf?

At a Glance

• Challenges of today’s more complex SoC devices
• How NoC optimizes communication & data flow
• 8 factors for choosing commercial vs. in-house NoCs

The developers of today’s system-on-chip (SoC) devices face a myriad of decisions. Some of the early choices start when defining the overall architecture of the device. Next comes the determination of which intellectual property (IP) functional blocks to be used and their origin.

Many IPs are purchased from trusted third-party vendors, such as processors from Arm and DDR memory controllers from Cadence or Synopsys, for example. Meanwhile, the secret-sauce IPs that will differentiate this SoC from its competitors are typically developed in-house. These IPs include specialized hardware accelerators, such as artificial intelligence, machine learning, and deep learning cores.

Depiction of a system-on-chip with multiple NoCs, or network-on-chip connections.

Interconnect: The obvious choice

The next decision is how to connect all the IPs together. Paradoxically, the increasing complexity of modern SoCs simplifies this choice significantly. In the not-so-distant past, designers used a bus-based interconnect. The next step was to employ a crossbar switch. These days, the only realistic option is to use a network-on-chip (NoC) for anything but the simplest SoCs. And, even having said this, many designers employ NoCs in even the simplest SoCs because of all the advantages they convey.

Coherent, non-coherent, or both?

Processors typically come in clusters with integrated caches. A typical configuration uses four to eight cores in which each core has a dedicated L1 cache, with all cores in the cluster sharing an L2 cache.

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